MC68HC705J1ACP

MC68HC705J1ACP, 8-bit, microcontroller unit, DIP20, -0.3V to +7.0V, 6.0mA, 12pF

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Price:: US $5.00~60.00 / piece [Get Latest Price]

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	US $5.00~60.00

PartNumber:: MC68HC705J1ACP

Brand:: Motorola, Inc - Motorola | Pack: DIP | D/C: 10+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Total Price:: US $0

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Products Upload time: 2012-10-09

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Part Number:MC68HC705J1ACP
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Product Summary

The MC68HC705J1ACP is a low-cost, high-performance 8-bit microcontroller unit (MCU). The MC68HC705J1ACPE is based on the customer-specified integrated circuit (CSIC) design strategy. The MC68HC705J1ACP uses the popular M68HC05 central processor unit (CPU) and are available with a variety of subsystems, memory sizes and types, and package types. The MC68HC705J1ACP includes 1240 bytes of erasable, programmable read-only memory (EPROM). In packages without the transparent window for EPROM erasure, the 1240 EPROM bytes serve as one-time programmable read-only memory (OTPROM).

Parametrics

MC68HC705J1ACP absolute maximum ratings: (1)Supply voltage VDD:–0.3V to +7.0V; (2)Current drain per pin (excluding VDD, VSS, and PA4–PA7) I: 25mA; (3)Input voltage VIn VSS:–0.3V to VDD + 0.3V; (4)IRQ/VPP pin VPP VSS:–0.3V to 2 x VDD + 0.3V; (5)Storage temperature range TSTG:–65℃ to +150℃.

Features

MC68HC705J1ACP features: (1)15-stage multifunction timer; (2)Computer operating properly (COP) watchdog; (3)10-mA sink capability on four I/O pins; (4)Mask option register (MOR) and software programmable pulldowns on all I/O pins; (5)MOR selectable interrupt on four I/O pins, a keyboard scan feature; (6)MOR selectable sensitivity on external interrupt (edge- and level-sensitive or edge-sensitive only); (7)On-chip oscillator with connections for: Crystal, Ceramic resonator, Resistor-capacitor (RC) oscillator, External clock; (8)1240 bytes of EPROM/OTPROM, including eight bytes for user vectors; (9)64 bytes of user random-access memory (RAM); (10)Memory-mapped I/O registers; (11)Fully static operation with no minimum clock speed; (12)Power-saving stop, halt, wait, and data-retention modes; (13)External interrupt mask bit and acknowledge bit; (14)Illegal address reset; (15)Internal steering diode and pullup resistor from RESET pin to VDD.